VR | 001 | clear overflow register |
=TR | 002 | set test register |
BITS | 003 | count number of bits in the word |
×F | 004 | floating point multiply |
×DF | 005 | floating point multiply double length result from 48bit operands |
006 | ||
×+F | 007 | like ×DF but then followed by double length addition |
NEGD | 010 | negate double length |
OR | 011 | inclusive or |
PERM | 012 | permute top 3 nest cells, N1 becomes N3 |
TOB | 013 | convert six chars in N1 to binary number, radix word in N2 |
ROUNDH | 014 | round to half word |
NEV | 015 | not equivalent, i.e. exclusive or |
ROUND | 016 | round double number in N1,N2 to single in N1 |
DUMMY | 017 | do nothing as quickly as possible |
ROUNDF | 020 | round floating point double number in N1,N2 to single in N1 |
ROUNDHF | 021 | round floating point number to half length |
DF | 022 | subtract double length floating point |
+DF | 023 | add double length floating point |
FLOAT | 024 | convert fixed point number to floating point |
FLOATD | 025 | convert double length fixed point number to floating point |
ABS | 026 | absolute value |
NEG | 027 | negate |
ABSF | 030 | absolute value floating point |
NEGF | 031 | negate floating point |
MAX | 032 | reorder N1, N2 to that larger is in N1 |
NOT | 033 | invert ones and zeroes |
×D | 034 | multiply two 48bit values to give double length result |
× | 035 | multiply |
| 036 | subtract |
SIGN | 037 | +1 if N1 N2 > 0, 1 if N1 N2 < 0, 0 if N1 N2 = 0, |
040 | ||
ZERO | 041 | put 0 in N1 |
DUP | 042 | duplicate, i.e. put copy of N1 in N1 |
DUPD | 043 | duplicate double length |
÷I | 044 | integer divide, N1 = remainder, N2 = quotient |
FIX | 045 | convert floating point to fixed point |
046 | ||
STR | 047 | stretch 48bit number to double length |
CONT | 050 | convert double length integer in N1, N2 to single length in N1 |
REVD | 051 | swap N1 and N3, N2 and N4 |
ERASE | 052 | remove top cell of the nest |
D | 053 | subtract double length |
AND | 054 | logical and |
055 | ||
+ | 056 | add |
+D | 057 | add double length |
÷ | 060 | divide |
÷D | 061 | divide double length |
÷F | 062 | divide floating point |
÷DF | 063 | divide double length floating point |
÷R | 064 | fancy divide for multiplength division |
REV | 065 | reverse, i.e. swap N1 and N2 |
CAB | 066 | permute top 3 nest cells, N3 becomes N1 |
FRB | 067 | convert binary to characters, radix in N2 |
STAND | 070 | standardise floating point number |
NEGDF | 071 | negate double length floating point |
MAXF | 072 | swap N1 N2 so that N1 is larger floating point |
073 | ||
+F | 074 | add floating point |
F | 075 | subtract floating point |
076 | ||
SIGNF | 077 | like SIGN but floating point |
Mq'Mq | 100 | 20q + q' | fetch 48bit value in address q + q' |
=Mq'Mq | 101 | 20q + q' | store 48bit value in address q + q' |
Mq'MqQ | 102 | 20q + q' | fetch 48bit value in address q + q' and increment Qq |
=Mq'MqQ | 103 | 20q + q' | fetch 48bit value in address q + q' and increment Qq |
Mq'MqH | 104 | 20q + q' | fetch 24bit value in address ½ q + q' to N1 top half and zeroise bottom half |
=Mq'MqH | 105 | 20q + q' | store 24bit value in address ½ q + q' N.B. top half of N1 |
Mq'MqQH | 106 | 20q + q' | fetch 24bit value in address ½ q + q' and increment Qq |
=Mq'MqQH | 107 | 20q + q' | store 24bit value in address ½ q + q' and increment Qq |
Mq'MqN | 110 | 20q + q' | fetch 48bit value in address q + q' + 1 |
=Mq'MqN | 111 | 20q + q' | store 48bit value in address q + q' + 1 |
Mq'MqQN | 112 | 20q + q' | fetch 48bit value in address q + q' + 1 and increment Qq |
=Mq'MqQN | 113 | 20q + q' | store 48bit value in address q + q' + 1 and increment Qq |
Mq'MqHN | 114 | 20q + q' | fetch 24bit value in address ½ q + q' + 1 |
=Mq'MqHN | 115 | 20q + q' | store 24bit value in address ½ q + q' + 1 |
Mq'MqQHN | 116 | 20q + q' | fetch 24bit value in address ½ q + q' + 1 and increment Qq |
=Mq'MqQHN | 117 | 20q + q' | store 24bit value in address ½ q + q' + 1 and increment Qq |
M+Iq | 140 | 20q | modifier of Mq increased by value in Iq |
MIq | 141 | 20q | modifier of Mq decreased by value in Iq |
NCq | 142 | 20q | negate Cq |
DCq | 143 | 20q | decrement Cq |
Iq=+1 | 144 | 20q | Iq = +1 |
Iq=1 | 145 | 20q | Iq = 1 |
Iq=+2 | 146 | 20q | Iq = +2 |
Iq=2 | 147 | 20q | Iq = 2 |
150 | |||
MqTOQq' | 151 | 20q + q' | copy Mq to modifier of Q' |
IqTOQq' | 152 | 20q + q' | copy Iq to increment of Q' |
IMqTOQq' | 153 | 20q + q' | copy Iq and Mq to increment and modifier of Q' |
CqTOQq' | 154 | 20q + q' | copy Cq to counter of Q' |
CMqTOQq' | 155 | 20q + q' | copy Cq and Mq to counter and modifier of Q' |
CIqTOQq' | 156 | 20q + q' | copy Cq and Iq to counter and increment of Q' |
QqTOQq' | 157 | 20q + q' | copy Qq to all of Q' |
160 | |||
SHACq | 161 | 20q | shift arithmetic by number of bits in Cq |
SHAn | 161 | 2n + 1 | shift arithmetic by n bits |
SHADCq | 162 | 20q | shift arithmetic double length by number of bits in Cq |
SHADn | 162 | 2n + 1 | shift arithmetic double length by n bits |
×+Cq | 163 | 20q | ×D; SHADCq; +D; |
×+n | 163 | 2n + 1 | ×D; SHADn; +D; |
SHLCq | 164 | 20q | shift logical by number of bits in Cq |
SHLn | 164 | 2n + 1 | shift logical by n bits |
165 | |||
SHLDCq | 166 | 20q | shift logical double length by number of bits in Cq |
SHLDn | 166 | 2n + 1 | shift logical double length by n bits |
SHCCq | 167 | 20q | shift cyclic by number of bits in Cq |
SHCn | 167 | 2n + 1 | shift cyclic by n bits |
=Mq | 170 | 20q + 2 | bottom 16 bits of N1 put in Mq |
=RMq | 170 | 20q + 3 | reset Qq to 0/1/0 then store N1 in Mq |
=Iq | 170 | 20q + 4 | bottom 16 bits of N1 put in Iq |
=RIq | 170 | 20q + 5 | reset Qq to 0/1/0 then store N1 in Iq |
=Cq | 170 | 20q + 10 | bottom 16 bits of N1 put in Cq |
=RCq | 170 | 20q + 11 | reset Qq to 0/1/0 then store N1 in Cq |
170 | 20q + 16 | all of N1 put in Mq | |
Mq | 171 | 20q + 2 | fetch Mq into N1 |
Iq | 171 | 20q + 4 | fetch Iq into N1 |
Cq | 171 | 20q + 10 | fetch Cq into N1 |
171 | 20q + 16 | fetch Qq into N1 | |
=+Mq | 172 | 20q + 2 | add value in N1 to Mq |
=+Iq | 172 | 20q + 4 | add value in N1 to Iq |
=+Cq | 172 | 20q + 10 | add value in N1 to Cq |
172 | 20q + 16 | add value in N1 to Qq | |
LINK | 173 | 0 | fetch top call of SJNS into N1 |
=LINK | 174 | 0 | store N1 into top call of SJNS |
JCqNZS | 177 | 20q | jump to start of previous word if Cq is nonzero |
=Kn | 175 | 27n | set special register directormode only |
Kn | 176 | 27n | fetch special register directormode only |
=K0 | 175 | 200 | if N1 = 0 then switch buzzer on else switch buzzer off |
=K1 | 175 | 100 | copy bits N1:D24D33 to NOL, bits N1:D34D35 to CPL and bits N1:D38D47 to BA |
=K2 | 175 | 40 | copy bits N1:D32D47 to CPDAR, where N1:D32 corresponds to buffer 15 and N1:D47 to buffer 0 |
=K3 | 175 | 20 | switch to a new Q store/nest/SJNS set, with new nest depths (see below) |
K4 | 176 | 10 | push CLOCK/RFIR onto nest. |
K5 | 176 | 04 | push PHU onto nest |
K7 | 176 | 01 | push the current register set number and nest depths, as represented for the =K3 instruction. |
CTQq | 120 | 20q | clear transfer directormode only |
MANUALQq | 120 | 20q + 1 | set peripheral unready |
BUSYQq | 120 | 20q + 2 | test if peripheral is busy |
MLBQq | 120 | 20q + 4 | set test register if previous read was a last block |
MBTQq | 120 | 20q + 10 | set test register if at begining of tape |
PARQq | 121 | 20q | test if peripheral has parity fail set |
METQq | 122 | 20q | test if peripheral has end tape set (tape deck) |
MFRQq, PRQq | 124 | 20q | forward read |
CLOQq | 124 | 20q + 2 | clear lockouts over area specified by IqMq directormode only |
TLOQq | 124 | 20q + 4 | test for lockout over area specified by IqMq |
PRCQq | 124 | 20q + 10 | read paper tape, all 8 holes to each 48bit word |
PREQq | 125 | 20q | forward read to end message character |
PRCEQq | 125 | 20q + 10 | read paper tape to end message character, all 8 holes to each 48bit word |
MBRQq | 126 | 20q | backward read |
MBREQq | 127 | 20q | backward read to end message character |
PWQq, MWQq | 130 | 20q | write |
MLWQq | 130 | 20q + 10 | write followed by tape mark, i.e. write a last block |
MGAPQq | 130 | 20q + 14 | leave a gap on mag tape |
PGAPQq | 130 | 20q + 14 | punch blank paper tape tape |
MWIPEQq | 130 | 20q + 4 | leave a really big clear gap on mag tape |
MWEQq, PWEQq | 131 | 20q | write to end message character |
MLWEQq | 131 | 20q + 10 | write to end message character followed by tape mark, i.e. write a last block |
MFSKQq | 134 | 20q | forward skip one block |
INTQq | 134 | 20q + 2 | if this device is busy suspend execution of this process until any peripheral transfer finishes |
MBSKQq | 136 | 20q | backward skip one block |
MRWDQq, PRWDQq | 136 | 20q + 10 | rewind |
PIAQq | 124 | 20q | ordinary read | MFRQq, PFRQq |
PIBQq | 125 | 20q | read to endmessage | MREQq, PREQq |
PICQq | 124 | 20q + 10 | PRCQq | PRCQq |
PIDQq | 125 | 20q + 10 | PRCEQq | PRCEQ |
PIEQq | 126 | 20q | MBRQq | MBRQq |
PIFQq | 127 | 20q | MBREQq | MBREQ |
PIGQq | 126 | 20q + 10 | alphanumeric char read on CR | |
PIHQq | 127 | 20q + 10 | alphanumeric char read to ® on CR | |
PMAQq | 134 | 20q | seek on disc | MFSKQq |
PMBQq | 120 | 20q + 10 | test MBT | MBTQq |
PMCQq | 120 | 20q + 04 | test MLB | MLBQq |
PMDQq | 136 | 20q + 10 | MRWD | MRWDQq |
PMEQq | 136 | 20q | MBSK | MBSKQq |
PMFQq | 122 | 20q | MET | METQq |
PMGQq | 122 | 20q + 04 | Read Cstore | |
PMHQq | 130 | 20q + 02 | Set lockout | |
PMKQq | 134 | 20q + 04 | IBM Even parity skip forward | |
PMLQq | 136 | 20q + 04 | IBM Even parity skip back | |
POAQq | 130 | 20q | ordinary write | MWQq, PWQq |
POBQq | 131 | 20q | write to endmessage | MWEQq, PWEQq, TWEQq |
POCQq | 130 | 20q + 10 | PWCQq and MLWQq | MLWQq |
PODQq | 131 | 20q + 10 | PWCEQq and MLWEQq | MLWEQq |
POEQq | 130 | 20q + 14 | PGAPQq and MGAPQq | MGAPQq, PGAPQq |
POFQq | 130 | 20q + 04 | MWIPEQq | MWIPEQq |
POGQq | 132 | 20q | CP A/N; FD Next sector | |
POHQq | 133 | 20q | CP A/N, ®; FD Next sector, ® | |
POKQq | 133 | 20q + 10 | CP A/N, ®, Character mode; FD Next sector, ®, fixed heads | |
POLQq | 132 | 20q + 10 | CP A/N, Character mode; FD Next sector, fixed heads |
This address is spread throughout the 3 sylables of the instruction.
e is broken down into
el the least significant 8 bits of e
em the next 4 significant bits of e
eh the single most significant bit
JE(e/s)= | 220 + 10eh + s | 20 + em | el | jump if N1 = N2 and erase N1 |
JE(e/s)¹ | 200 + 10eh + s | 20 + em | el | jump if N1 ¹ N2 and erase N1 |
JE(e/s)<Z | 220 + 10eh + s | 40 + em | el | jump if N1 < 0 and erase N1 |
JE(e/s)³Z | 200 + 10eh + s | 40 + em | el | jump if N1 ≥ 0 and erase N1 |
JE(e/s)>Z | 220 + 10eh + s | 100 + em | el | jump if N1 > 0 and erase N1 |
JE(e/s)£Z | 200 + 10eh + s | 100 + em | el | jump if N1 ≤ 0 and erase N1 |
JE(e/s)=Z | 220 + 10eh + s | 140 + em | el | jump if N1 = 0 and erase N1 |
JE(e/s)¹Z | 200 + 10eh + s | 140 + em | el | jump if N1 ¹ 0 and erase N1 |
JE(e/s)V | 220 + 10eh + s | 200 + em | el | jump if overflow is set |
JE(e/s)NV | 200 + 10eh + s | 240 + em | el | misprint in manual |
JE(e/s)NV | 200 + 10eh + s | 200 + em | el | jump if overflow is not set probably true entry |
JE(e/s)EN | 220 + 10eh + s | 240 + em | el | jump if nesting store is empty |
JE(e/s)NEN | 200 + 10eh + s | 240 + em | el | if nesting store is not empty |
JE(e/s) | 200 + 10eh + s | 260 + em | el | jump unconditionally |
JSE(e/s) | 200 + 10eh + s | 320 + em | el | jump into a subroutine, address of nexxt instruction is pushed into the SJNS |
JE(e/s)EJ | 220 + 10eh + s | 300 + em | el | jump if SJNS is empty |
JE(e/s)NEJ | 200 + 10eh + s | 300 + em | el | jump if SJNS is not empty |
JE(e/s)TR | 220 + 10eh + s | 340 + em | el | jump if test register is set |
JE(e/s)NTR | 200 + 10eh + s | 340 + em | el | jump if test register is not set |
JE(e/s)CqZ | 240 + 10eh + s | 20q + em | el | jump if Cq is zero |
JE(e/s)CqNZ | 260 + 10eh + s | 20q + em | el | jump if Cq is nonzero |
OUT | 200 | 220 | 0 | enter director see below |
EXITD | 222 | 360 | 0 | exit director directormode only |
EXIT1 Ee | 200 | 360 + em | el | exit subroutine |
EXIT Ee | 202 | 360 + em | el | exit subroutine |
EXIT3 Ee | 200 | 360 + em | el + 1 | exit subroutine |
EXIT2 Ee | 202 | 360 + em | el + 1 | exit subroutine |
EXIT2 means exit two half words (i.e. one whole word) after the address in the SJNS, and is used as the normal exit from a subroutine, when that subroutine also has an error condition to indicate. In the case of error, the subroutine would do EXIT1 in the expectation that the next instruction was a jump to the error processing routine.
It was also occasionally used to implement a switch by placing a computed address in the SJNS, and using the EXIT label instruction where label was at the start of a list of jump instructions.
This address is spread throughout the 3 sylables of the instruction.
e is broken down into
el the least significant 8 bits of e
em the next 4 significant bits of e
eh the three most significant bits
For the SET instruction
nl the least significant 8 bits of n
nh the most significant 8 bits of n
Ee | 300 + 10eh | em | el | fetch 48bit word from absolute address |
=Ee | 301 + 10eh | em | el | store 48bit word in absolute address |
EeMq | 300 + 10eh | 20q + em | el | fetch 48bit word from e + Mq |
=EeMq | 301 + 10eh | 20q + em | el | store 48bit word in e + Mq |
EeMqQ | 302 + 10eh | 20q + em | el | fetch 48bit word from e + Mq and increment Qq |
=EeMqQ | 303 + 10eh | 20q + em | el | store 48bit word in e + Mq and increment Qq |
SETn | 304 | nh | nl | put the value n in N1 |
The “out number” was in N1 and any other parameters in N2 etc. Obeying OUT with an empty nest was equivalent to OUT 0.
N1 | N2 | N3 | Action |
0 | n/a | n/a | end the program |
1 | program name | load and enter a new code module whose name is in N2/N3 | |
2 | time limit | n/a | enter a new code module which is already in store |
3 | n/a | n/a | put time used so far in N1 |
4 | tape label | n/a | claim mag tape with 8 char label unit number in N1 |
5 | 1 = paper tape punch
2 = paper tape reader 3 = line printer 4 = card reader | n/a | claim peripheral device unit number in N1 |
6 | unit number | n/a | deallocate peripheral device |
7 | mt unit number | n/a | deallocate mag tape, but leave loaded |
8 | params in Qstore format | n/a | transfer to the output well, 1st word is stream number, subsequent words are data to be transfered |
8 | params in Qstore format | n/a | C = I = M = stream number, close the stream |
9 | n/a | n/a | put clockonthewall time in N1 |
10 | tape label | claim mag tape with 16 char label unit number in N1 | |
14 | ? | ? | someting to do with job accounting |
15 | ? | ? | someting to do with job accounting |
17 | n/a | n/a | put notional elapsed time in N2 and run time in N1 |
19 | ? | ? | someting to do with job accounting |
20 | Q/LO/HI (644 word buffer) | n/a | General text file location routine (NPL only)
Enter with W0/1 of buffer = identifier Exit nest empty. Buffer containing W0= D0-23 Disc address of index block D24-47 Program address of entry - if found D24-47 0 - if not found W1= FOC library/FOC archive W3= mask W4-643= index block |
25 | Q/LO/HI of prog now in store | n/a | restore dumped prog if D0=0, swop levels if D0=1 Used by JO to restart prog after JO has rolled it back into store |
39 | ? | ? | initiate foreground job |
50 | ? | ? | put stats block (job accounting) onto the OUT8 tape |
51 | ? | ? | put stats block (job accounting) onto the OUT8 tape |
KDF9 Lineprinter
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KDF9 Paper TapeAlthough the paper tape was 8-hole, it was used in a most curious way, and each row of holes produce only one 6-bit character in the machine.ooooo.ooo s::p: :::The holes marked with colons are the 6 bits that are transfered to the machine. The hole marked p is the parity bit. Parity is even. The hole marked s was only used in the space chacter so as to distinguish it from blank tape. It was a two shift system, the cases being called shift and normal.
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